Multilayer circuit board

ABSTRACT

A multilayer circuit board includes a first substrate and a second substrate in stack. The first substrate is provided with a first pad, a second pad, and a first sub-circuit. The first pad and the second pad are electrically connected to the first sub-circuit. The second substrate has a top surface, a bottom surface, and an opening. The bottom surface of the second substrate is attached to the top surface of the first substrate. The opening extends from the top surface to the bottom surface of the second substrate. The first pad of the first substrate is in the opening of the second substrate; the second pad of the first substrate is not covered by the second substrate. The second substrate further provided with a pad on the top surface and a second sub-circuit electrically connected to the pad of the second substrate.

BACKGROUND OF THE INVENTION

1. Technical Field

The present invention relates to a circuit board, and more particularlyto a multilayer circuit board.

2. Description of Related Art

FIG. 1 shows a conventional multilayer circuit board 1, including aplurality of substrates 10 with several plated through holes 12.Electronic components (not shown) are provided on exterior surfaces ofthe top and the bottom substrates. The top substrate 10 is provided witha plurality of pads 102 for a specific device, such as wires or probes(not shown), to conduct an electrical connection. Each substrate 10 hasa sub-circuit 104, and the plated through holes 12 conduct electricalconnections of the sub-circuits 104 form a circuit.

The substrates 10 have to be precisely positioned in the laminationprocess for aligning the through holes 12. However, the precisealignment is harder when there are more substrates in the multilayercircuit board. Therefore, the yield rate of making the multilayercircuit boards is low. In addition, the signal transmission in theplated through holes 12 might be interfered while there are traces(shown by dot lines in FIG. 1) around the through holes 12. Typically,the plated through hole 12 includes an effective section 12 a, which isbetween the sub-circuit and the pad for signal transmission between thesub-circuit and the pad, and a null section 12 b, which is under thesub-circuit and transmits no signal. The effective sections 12 a of theplated through hole 12 will be longer while there are more substrates,and the alignment problem will be more significant. However, thereusually are parasitic capacitances and parasitic inductances in the nullsections 12 b. So, the signal interference problem will be more seriouswhile null sections 12 b are longer.

Furthermore, the pads 102 usually are provided on the same surface ofthe multilayer circuit board 1. It is easy to understand that the pads102 take a space of the surface, and there will be less space for thetraces while there are more pads 102 on the surface, and that might be aproblem of insufficient traces to connect to all the pads 102.

BRIEF SUMMARY OF THE INVENTION

In view of the above, the primary objective of the present invention isto provide a multilayer circuit board, which may reduce the distance ofsignal transmission between the pads and the traces to increase thecapacity of signal transmission and the yield rate of making themultilayer circuit boards.

The secondary objective of the present invention is to provide amultilayer circuit board, which has a surface larger than the prior art.

In order to achieve the objectives of the present invention, amultilayer circuit board includes a first substrate and a secondsubstrate in stack. The first substrate is provided with a first pad, asecond pad, and a first sub-circuit, wherein the first pad and thesecond pad are electrically connected to the first sub-circuit, andprovided on a top surface of the first substrate. The second substratehas a top surface, a bottom surface, a lateral edge, and an opening. Thebottom surface of the second substrate is attached to the top surface ofthe first substrate. The opening extends from the top surface to thebottom surface of the second substrate. The first pad of the firstsubstrate is in the opening of the second substrate; the second pad ofthe first substrate is beside the lateral edge of the second substrate,and is not covered by the second substrate. The second substrate furtherprovided with a pad on the top surface and a second sub-circuitelectrically connected to the pad of the second substrate.

The present invention provides the pads on each substrate. Using theheight difference caused by the substrates, the pads are kept withsufficient distances from each other in a small board to reduce theinterference problem in signal transmission and increase the yield rateof making the multilayer circuit board.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

The present invention will be best understood by referring to thefollowing detailed description of some illustrative embodiments inconjunction with the accompanying drawings, in which

FIG. 1 is a sectional view of the conventional multilayer circuit board;

FIG. 2 is a sectional view of a first preferred embodiment of thepresent invention;

FIG. 3 is a sectional view of the first preferred embodiment of thepresent invention, showing the first type of the conductor;

FIG. 4 is a sectional view of the first preferred embodiment of thepresent invention, showing the second type of the conductor;

FIG. 5 is a sectional view of the first preferred embodiment of thepresent invention, showing the third type of the conductor;

FIG. 6 is a sectional view of a second preferred embodiment of thepresent invention;

FIG. 7 is a sectional view of a third preferred embodiment of thepresent invention;

FIG. 8 is a sectional view of a fourth preferred embodiment of thepresent invention;

FIG. 9 is a sectional view of a fifth preferred embodiment of thepresent invention; and

FIG. 10 is a sectional view of a sixth preferred embodiment of thepresent invention.

DETAILED DESCRIPTION OF THE INVENTION

As shown in FIG. 2, a multilayer circuit board 2 of the first preferredembodiment of the present invention includes a first substrate 20 andtwo second substrates 22, 24. The first substrate 20 and the secondsubstrates 22, 24 each have two laminates.

The first substrate 20 has a top surface 20 a and a bottom surface 20 b.The first substrate 20 is provided with a first pad 202 and a second pad204 on the top surface 20 a. The first substrate 20 is provided with afirst sub-circuit 206 between the laminates, which means that the firstsub-circuit 206 is embedded in the first substrate 20, and two platedthrough holes 208 electrically connected to the first pad 202 and thesecond pad 204 respectively.

The second substrate 22 is stacked on the first substrate 20, and theother second substrate 24 is stacked the second substrate 22. Eachsecond substrate 22, 24 has a top surface 22 a, 24 a, a bottom surface22 b, 24 b, an opening 22 c, 24 c, and a lateral edge 22 d, 24 d. Thebottom surface 22 b of the second substrate 22 is attached to the topsurface 20 a of the first substrate 20, and the top surface 22 a of thesecond substrate 22 is attached to the bottom surface 24 b of the secondsubstrate 24. The opening 22 c of the second substrate 22 is alignedwith the opening 24 c of the second substrate 22 to form a through holeof the second substrates 22, 24 and expose a portion of the top surface20 a of the first substrate 20 where the first pad 202 is provided. Inother words, the first pad 202 is received in the opening 24 c. Thesecond substrate 22 is smaller than the first substrate 20, and thesecond pad 204 of the first substrate 20 is beyond the lateral edge 22 dof the second substrate 22, which means that the second pad 204 is notcovered by the second substrate 22. The second substrate 24 is providedwith two pads 222, 222′ and a second sub-circuit 224 electricallyconnected to the pads 222, 222′. The second substrate 24 is smaller thanthe second substrate 22, and the pad 222 is beyond the lateral edge 24 dof the second substrate 24, which means that the pad 222 is not coveredby the second substrate 24, or the pad 222 is between the lateral edges22 d, 24 d of the second substrates 22, 24.

The second substrate 24 further is provided with an opening 24 e, whichexposes a portion of the top surface 22 a of the second substrate 22 andthe pad 222′. The second substrate 24 further is provided with two pads242, 242′ on the top surface 22 a, a second sub-circuit 244, and twoplated through holes 246. The second sub-circuit 244 is electricallyconnected to the pads 242, 242′ through the plated through holes 246.

It is easy to understand that the multilayer circuit board 2 of thepresent invention has six pads 202, 204, 222, 222′, 242, and 242′, twoof which 202, 204 are on the first substrate 20, another two of whichare on the second substrate 22, and the rest two of which are on thesecond substrate 24. With the height difference caused by the substrates20, 22, and 24, the pads 202, 204, 222, 222′, 242, and 242′ are keptwith sufficient distances from each other in a small board to reduce theinterference problem in signal transmission. It is noted that probes Phave to be inserted into the openings 22 c, 24 c, 24 e respectively totouch the pads 202, 222′ therein.

With different lengths of the substrates 20, 22, and 24, the substrates20, 22 each have an exposed region at a margin thereof, which are notcovered by the above substrates 22, 24. The pads 204, 222 on the exposedregions of the substrates 20, 22 may be connected to wires W. With theheight difference, it may reduce the interference problem, or connectmore wires to the multilayer circuit board 2.

As shown in FIG. 3, the multilayer circuit board 2 further is providedwith a conductor 26 received in the openings 22 c, 24 c of the substrate22, 24 to touch the pad 202. A top end of the conductor 26 is about evenwith the top surface 24 a of the second substrate 24. The probe P cantouch the conductor 26 instead of the pad 202 in the openings 22 c, 24c.

FIG. 4 shows an alternate conductor 28, which includes a head 282 and arod 284. The rod 284 has an end connected to the head 282, and anopposite end touching the pad 202. The head 282 is wider than the rod284, and leans against a sidewall of the opening 24 c of the secondsubstrate 24 to hold the conductor 28 at a middle of the openings 22 c,24 c. The head 282 further has a recess 282 a on a top to receive a tipof the probe P. FIG. 5 shows another conductor 28, which includes a head302, a rod 304, and an elastic member 306. The elastic member 306 is aspring here. The head 302 is provided with a recess 302 a, and the rod304 is provided with a hole 304 a on an end to receive the spring 306.The rod 304 has an end, which is opposite to the hole 304, touching thepad 202 in the opening 22 c, and the head 20 has a annular protrusion ata bottom received in the opening 24 c, and rests against an end of thespring 306. As a result, the head 302 is urged by the spring 306 toprovide the probe P a buffer when it moves downward to touch the head302, and reduce the pressure of the probe P on the pad 202.

As shown in FIG. 6, a multilayer circuit board 3 of the second preferredembodiment of the present invention, which is similar to the firstembodiment, and the different parts include a first substrate 32 withtwo first pads 322 and two second pads 324, wherein the first pads 322are under openings 34 a, 36 a of two second substrates 34, 36, and thesecond pads 324 are on an exposed region of a top surface 32 a of thefirst substrate 32, which is not covered by the second substrates 34,36. The second substrate 36 is smaller than the second substrate 34, andthe first substrate 32 is smaller than the second substrate 34, so thatthe first substrate 32 has an annular exposed region between lateraledges 32 b, 34 b of the first and the second substrates 32, 34, and thesecond substrate 34 has an annular exposed region between lateral edges34 b, 36 b of the second substrates 34, 36. The second substrate 34includes four pads 342, two of which are on the exposed region of thesecond substrate 36, and the other two of which are under two openingsof the second substrate 36. The second substrate 36 includes four pads362. The pads 324, 342, 362 beyond the lateral edges 32 b, 34 b, 36 b(on the exposed regions) of the substrates 32, 34, 36 are adapted to beconnected to wires (not shown).

FIG. 7 shows a multilayer circuit board 4 of the third preferredembodiment of the present invention, which is similar to the firstembodiment, except that all the substrates 38, 40, 42 have the samesize. The second substrate 42, is provided with a hole 42 a, and thesecond substrate 40 has a hole 40 a under the hole 42 a. The hole 42 aof the second substrate 42 is bigger than the hole 40 a of the secondsubstrate 40. Therefore, the first substrate 38 has an exposed regionunder the hole 40 a, and the second substrate 40 has an annular exposedregion under the hole 42 a and between lateral edges 40 b, 42 b of thesecond substrates 40, 42. The first substrate 38 is provided with twopads 382 on the exposed region thereof, and the second substrate 40 isprovided with two pads 402 on the exposed region thereof. Wires (notshown) are connected to these pads 382, 402 at a middle of themultilayer circuit board 4.

FIG. 8 shows a multilayer circuit board 5 of the fourth preferredembodiment of the present invention, which is similar to the multilayercircuit board 4 of the third embodiment, except that a first substrate44 further is provided with a hole 44 a under the hole 40 a of thesecond substrate 40. An exposed region of the first substrate 44 isdefined between a lateral edge 44 b, which is a sidewall of the hole 44a of the first substrate 44, and the lateral edge 40 of the secondsubstrate 40. Wires (not shown) may pass through the hole 44 a of thefirst substrate 44 from a bottom of the multilayer circuit board 5 to beconnected to the pads.

FIG. 9 shows a multilayer circuit board 6 of the fifth preferredembodiment of the present invention, which is similar to the multilayercircuit board 5 of the fourth embodiment, except that two thirdsubstrates 50, 52 in stack are attached to a bottom surface 46 a of afirst substrate 46. The first substrate 46 further has a third pad 462and a fourth pad 464 on the bottom surface 46 a, wherein the third pad462 is on an exposed region on the bottom surface 46 a of the firstsubstrate 46. The same as second substrates 48, the third substrates 50,52 each has two pads 502, 502′, 522, 522′ on bottom surfaces 50 a, 52 athereof, wherein the pad 502 is on the exposed region of the thirdsubstrate 50, and the pad 502′ is under an opening of the thirdsubstrate 52.

The third substrate 50 is bigger than the third substrate 52, so thatthe third substrate 50 has an exposed region between lateral edges 50 c,52 c of the third substrates 50, 52, and the pad 502 is provided on theexposed portion. The fourth pad 464 of the first substrate 46 is beyondthe lateral edge 50 c of the third substrate 50, and not covered by thethird substrates 50, 52. The other pad 502′ of the third substrate 50 isunder the opening 52 d of the third substrate 52. As a result, wires(not shown) of the first and the second substrate 46, 48 could pass theopening 46 b of the first substrate 46, and be connected to the pads502, 522 of the third substrates 50, 52.

In the embodiments of above, each substrate has two laminates and thesub-circuit is provided between the laminates, and the plated throughholes, to which the pads are connected, extend through both thelaminates only, which means that these plated through holes is in onesubstrate only, and that minimizes the lengths of these plated throughholes to reduce the interference problem and the parasitic capacitanceand inductance problem. In practice, it would provide one or more thantwo second and third substrates in the multilayer circuit board.

FIG. 10 shows a multilayer circuit board 7 of the sixth preferredembodiment of the present invention, in which each substrate 54 isprovided with a sub-circuit 544 on a top surface thereof instead ofembedded in the substrate. Each substrate 54 further has pads 542 on thetop surface directly electrically connected to the sub-circuit 544. Itis easy to understand that no plated through hole is needed in themultilayer circuit board 7. Such substrate may be applied in the aboveembodiments.

In conclusion, the multilayer circuit board may shorten the distancesbetween the pad and the sub-circuit, and furthermore, no plated throughhole extends through two or more substrates that could avoid thealignment problem to increase the yield rate of making the multilayercircuit boards. Even for the substrate with an embedded sub-circuit, thelength of the plated through hole is short enough to avoid the aboveproblem. With the height difference design in the multilayer circuitboard of the present invention, it may provide more pads and sub-circuiton the multilayer circuit board.

It must be pointed out that the embodiments described above are onlysome preferred embodiments of the present invention. All equivalentstructures which employ the concepts disclosed in this specification andthe appended claims should fall within the scope of the presentinvention.

What is claimed is:
 1. A multilayer circuit board, comprising: a firstsubstrate provided with a first pad, a second pad, two plated throughholes, and a first sub-circuit, wherein the two plated through holes areelectrically connected to the first pad and the second pad respectively;the first pad and the second pad are electrically connected to the firstsub-circuit through the two plated through holes, and are provided on atop surface of the first substrate; and a second substrate having a topsurface, a bottom surface, a lateral edge, and an opening, wherein thebottom surface of the second substrate is attached to the top surface ofthe first substrate; the opening extends from the top surface to thebottom surface of the second substrate, and the first pad of the firstsubstrate is in the opening of the second substrate; the second pad ofthe first substrate is beside the lateral edge of the second substrate,and is not covered by the second substrate; the second substrate furtherprovided with a pad on the top surface and a second sub-circuitelectrically connected to the pad of the second substrate; anothersecond substrate attached to the top surface of the second substrate,wherein the another second substrate has an opening and a lateral edge;the opening of the another second substrate is communicated with theopening of the second substrate; the second substrate further isprovided with another pad on the top surface thereof and two platedthrough holes electrically connected to the pad and the another pad ofthe second substrate respectively; the another second substrate isprovided with another opening; and the another pad of the secondsubstrate is in the another opening of the another second substrate,wherein the pad and the another pad of the second substrate areelectrically connected to the second sub-circuit through the two platedthrough holes of the second substrate; wherein the another secondsubstrate is further provided with two pads, two plated through holeselectrically connected to the two pads respectively, and another secondsub-circuit electrically connected to the two pads through the twoplated through holes; wherein the two plated through holes in onesubstrate among the first substrate, the second substrate, and theanother second substrate are not extended to another substrate among thefirst substrate the second substrate and the another second substrate.2. The multilayer circuit board of claim 1, further comprising anothersecond substrate attached to the top surface of the second substrate,wherein the second substrate further is provided with a pad on the topsurface thereof, which is beside the lateral edge of the another secondsubstrate, and is not cover by the another second substrate.
 3. Themultilayer circuit board of claim 1, wherein the second substrate isprovided with a hole, in which the second pad of the first substrate isreceived; and a sidewall of the hole forms the lateral edge of thesecond substrate.
 4. The multilayer circuit board of claim 3, whereinthe first substrate has a bottom surface and an opening; the openingextends from the top surface to the bottom surface, and is communicatedwith the hole of the second substrate.
 5. The multilayer circuit boardof claim 4, further comprising a third substrate, wherein the firstsubstrate further is provided with a third pad and a fourth pad on thebottom surface; the third substrate has a top surface, a bottom surface,a lateral edge, and an opening; the top surface of the third substrateis attached to the bottom surface of the first substrate; the openingextends from the top surface to the bottom surface of the thirdsubstrate, and the third pad of the first substrate is in the opening ofthe third substrate; the fourth pad of the first substrate is beside thelateral edge of the second substrate, and is not covered by the secondsubstrate; the third substrate further is provided with a pad on thebottom surface thereof and a sub-circuit electrically connected to thepad.
 6. The multilayer circuit board of claim 5, further comprisinganother third substrate attached to the bottom surface of the thirdsubstrate, wherein the another third substrate has an opening and alateral edge; the opening of the another third substrate is communicatedwith the opening of the third substrate; the third substrate further isprovided with a pad on the bottom surface thereof, which is beside thelateral edge o the another third substrate, and is not cover by theanother third substrate.
 7. The multilayer circuit board of claim 6,wherein the third substrate further is provided with another pad on thebottom surface thereof; the another third substrate is provided withanother opening; and the another pad of the third substrate is in theanother opening of the another third substrate.
 8. The multilayercircuit board of claim 1, wherein the second substrate is smaller thanthe first substrate; the second pad of the first substrate is beyond thelateral edge of the second substrate.
 9. The multilayer circuit board ofclaim 1, further comprising a conductor received in the opening of thesecond substrate, wherein a bottom end of the conductor touches thefirst pad of the first substrate.
 10. The multilayer circuit board ofclaim 9, wherein the conductor is provided with a recess on a top endthereof.
 11. The multilayer circuit board of claim 10, wherein theconductor includes a head, a rod, and an elastic member; the head isprovided with the recess; the rod touches the first pad of the firstsubstrate; and the elastic member has opposite ends urging the head andthe rod respectively.